The use of one-time-programmable (OTP) memories as non-volatile storage for code in ultra-low power deeply embedded systems has recently been deployed. OTPs have been used for storing a secret key, system configuration parameters, or as bit flags for various operations within a System on Chip (SoC). Lately, new technologies have enabled the use of larger OTP cells (i.e. 64 Kbytes) for storing the firmware of the System-On-Chip (SoC).
A disadvantage of the OTP is that if a certain memory space is programmed, it cannot be programmed again. Thus, if a bug in the firmware exists, the system cannot be upgraded since the OTP cannot be “corrected”. Another disadvantage is that OTP has relatively high power dissipation when accessed.
Patches for OTP's may be provided in form of a pre-defined jump table to specify patchable subroutines that contains a list of possibly patchable functions and their start addresses in the OTP memory.
It is a challenge for designers of OTP memories to find a way to correct content of OTPs without requiring pre-defined jump tables.